Qume DataTrak 8 Manual descargar pdf (Pagina 16)

SECTION 2 HARDWARE DESCRIPTION

enable (RE* and WE*) timing for the FD 1791-01. A section of IC

1F and U-5 provide a MOS level clock driver for the Z80A as

recommended by Zilog.

Figure 2-6. Clock Circuit

2.8 PROCESSOR

The on-board processor function is implemented with the Z80A.

It was selected because of execution speed and compatibility

with TTL logic families. The processor uses the on-board 2K

static memory for program, stack, parameters, and for buffering

single/multiple sectors of data. Because the 5 upper address

bits are not decoded, this 2K block appears 32 times in the Z80A

64K address range. This allows internal programs to be assembled

on Bny 2K boundary. Note, the address selected for the memory

window has no effect on the on-board processor or the on-board

software.

The host system communicates with the on-board processor thru

the memory window. During a system boot, the control program

must be loaded thru the memory window before the on-board

processor can operate properly. It is entirely possible for the

initial control program to be a small bootstrap which then loads

a larger control program from disk. For reading and writing disk

sectors, the host system must block move sector data through the

memory window.

Both Z80A interrupts are implemented. The host system issues

the maskable interrupt by executing an OUTPUT instruction to the

Disk Processor Control Port. The FD 1791-01 issues an interrupt

upon command completion. The Z80A NMI* pin is used for

interrupts from the 1791-01. This interrupt is clamped by CR18

when DSE (Drive Select Enable) is low.

2.9 DISK CONTROLLER

The Western Digital 1791-01 is used for all data transfers to

and from disk. This device is addressed as four I/O ports from

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Qume DataTrak 8 Manual Pagina 16